1. Field of the Invention
This invention relates generally to semiconductor devices, and more particularly to a method for manufacturing having a layer of hemispherical grain polysilicon (referred to herein as "HSG-Si" for use as a capacitor electrode
2. Description of the Related Art
In a dynamic random access memory (DRAM) device, an increase in cell capacitance improves the reading operation of a memory cell and reduces the soft error rate. This greatly improves the operational characteristics of the memory cell. However, as the integration level of semiconductor device increases, the chip area available for each unit memory cell decreases, thereby resulting in a reduction in the area available for each cell capacitor. Therefore, it is necessary to increase the cell capacitance per a unit area to maintain adequate performance at increased integration levels.
Accordingly, much research into methods for increasing the cell capacitance has been conducted. Most of the research has concentrated on modifying the structure of the lower electrodes of cell capacitors. Examples of modified structures that have been proposed are a fin structure, a box structure or a cylindrical structure.
However, increasing the cell capacitance by changing the structure of the lower electrode of the cell capacitors has drawbacks due to a limited design-rule and an increased soft error rate caused by the complicated manufacturing processes required to realize these structures.
Accordingly, a need remains for an improved technique for increasing the capacitance of unit cell capacitors in a semiconductor memory device.